The battle for AI supremacy is being fought on two fronts: hardware and software.

And although we are focusing on hardware today, it’s important to understand that, nowadays, hardware is dictated by AI models, which are improved in two ways, known as ‘scaling laws’.

In a nutshell, larger and longer thinkers are the way to go. Both are important because they naturally help us understand what is going on in the famous AI buildout.

AI hardware scales in three ways:

And how do each affect both training and inference?

Larger training budgets (training models on more data for longer) dictate how large hardware clusters and data centers get; that’s why data centers are getting so big.

In other words, what really matters for training is how many accelerators in total you can allocate to a single task, like training a frontier model. It’s not whether each chip doubles performance; what matters is whether you can double chip count, because chip performance grows way slower than what is required today.

On the flip side, inference dictates hardware in another way. A good way to understand this is that, while training only cares about growing chip count, even if that means every sequence is very slow to process, inference is latency-sensitive.

This means that, in an ideal world, inference would be performed on a single accelerator (e.g., a single GPU), avoiding the overhead of communication between accelerators. Sadly, we can rarely do that, but we still desire to be the smallest number possible.

This means inference is intranode, meaning we keep ourselves inside a single server to avoid the extremely slow scale-out and scale-across speeds. If we have more user demand, we deploy more servers with new model instances, but we never scale a single model across two servers.

In a nutshell, software dictates how large servers get. Circling back to the three ways of scaling hardware mentioned beforehand, that gives us:

And when you consider that Reinforcement Learning training, or trial-and-error training, requires models to try several times until they get the correct response, meaning you are running models (inference) during training, this makes scale-up the most essential metric in AI these days (at both ends of the court).

Knowing this, understanding what NVIDIA is trying to do with the next generations now becomes much easier, almost like child's play.

As we said, the primary way of scaling hardware today is through the three metrics discussed above.

This eases the pressure on single-chip performance, which is already running to the limits of Moore’s Law (e.g., from Blackwell to Rubin, the upcoming GPU generation by NVIDIA, transistor density has not doubled as Moore’s Law would have suggested, but has increased by low single digits).

A 50% improvement sounds like a lot, but it’s nowhere near the required pace of progress. Therefore, increasing world size, another way to refer to scaling up, is the way to go.

To prove this point, we can look at Vera Rubin, NVIDIA's upcoming GPU platform. And what all its forthcoming products have in common is that the number of chips on each server is equal to or greater than that of the largest server today, the GB300 NVL72. Later, we’ll see the numbers in more detail as we compare them to China’s offering.

The other significant hardware change that is directly linked to software is memory. As we mentioned earlier, current AI is improved by making it bigger and letting it think for longer.

In practice, this makes memory the main bottleneck, especially for inference. It’s not compute (even though per-die compute is stagnating, as we were saying), but it doesn’t matter because memory is a far larger bottleneck.

In practice, this means the amount of memory per chip, measured in gigabytes and soon, Terabytes, is exploding, going from 40 GB in 2020 with NVIDIA’s A100 to 288GB with 2026 chips, and increasing to, get this, 1 Terabyte of memory per chip with the Rubin Ultra chip slated for 2027.

So, to summarise, AI software, or models, requires AI infrastructure to get bigger and to have more compute available, both of which, in their own ways, are making hardware a system game.

And once you get this, all you’re about to read next will fall into place very quickly. Prepare to become more of an expert on AI than most blue-chip analysts (I’m not exaggerating; most professionals in this industry don’t understand most of what we are about to cover).

To fully understand this “war” between the US and China, we need to look at three things: software (comparisons between AI models), hardware (comparisons between AI systems), and, perhaps most importantly, supply chain and geopolitical concerns.

Today, we are focusing on the latter two, so that I can show you how wrong most Western analysts are about China.

The entire thesis sits around two notions: systems matter more than chips, and China doesn’t care about profits. Stay with me.

To drive this home, we will compare what each bloc offers directly, side-by-side, and draw conclusions from that. Starting off, even though I’ve told you systems are what matter, in the comparison with China, we also need to compare single-chip performance, because that will help us understand China’s decisions.

Below is a direct, single-chip comparison of the US and China’s most powerful chips currently: the NVIDIA Blackwell B300 and the Ascend 910C.

As you can see, NVIDIA seems to be ahead in all fronts, literally everywhere, both in terms of raw performance (compute and memory) and also efficiency (performance as a fraction of both power and dollars).

It’s literally night and day!

But let’s compare servers now. Instead of comparing single-chip solutions, we are now going to compare the top AI servers from China and the US: the Huawei CloudMatrix and the NVIDIA Blackwell Ultra.

As Hemingway wrote once, “gradually, then suddenly,” and just a few lines later, the tables have turned, we have completely reversed the framing of who’s ahead in terms of nominal throughput.

And let’s take it a step further into the future and compare 2026 and beyond at the server level, now including both Huawei’s and NVIDIA’s upcoming servers based on the new Ascend 950DT and Rubin chips slated for 2026 and 2027, even though some metrics are still unknown, paradoxically to the companies themselves.

At this point, it’s clear: on a nominal basis, without accounting for efficiency, China is racing past the West by sacrificing efficiency in lieu of outsized global performance.

The silver lining for the West here is Google, whose Ironwood pod, released this year, is highly competitive even with Huawei’s Atlas 960 SuperPoD slated for 2027, ahead in terms of compute and behind in terms of memory simply because each NPU has more HBM memory (288 GB) than each Ironwood TPU (192GB). However, that’s not an engineering advantage; it’s just putting more memory into each chip.

Leaving efficiency to bear, by all accounts, Huawei is ahead of NVIDIA. But wait, efficiency matters, right?

We need to make our deployments efficient to make money from them. It’s all that we care about in the West! However, that’s your Western bias doing the talking, because here’s the thing:

This is the overarching conclusion I want everyone to digest here: China isn’t treating AI as a technology to make money right now; it’s a national security technology, where profits take a back seat to national interests and thus, can come later (if ever).

Yes, Huawei’s servers aren’t close to being remotely marketable, seeing NVIDIA and other US options, especially in the power-constrained West, but China. doesn’t. care. They will subsidize the use of domestic chips as long as they need to to advance their domestic chip efforts.

That’s why they are still increasingly pushing for local adoption of Chinese chips over NVIDIA's, offering huge subsidies in return and absorbing the losses for their AI Labs. That’s why China wasn’t desperate for lighter export controls even after the US lifted the ban on selling NVIDIA H200s to China (more on this later). The commitment to having a strong internal chip design and manufacturing is unwavering. This is best summarised by Chinese semiconductor analyst Poe Zhao after the US unlocked purchases of H200 to Chinese Labs:

But what China does care about, and where things start to get really interesting, is feasibility, because wanting is not the same as being able to.

I’m a staunch believer, and so should be most “experts”, that the US’s competitive moat is not software. It’s not hardware specs either, as we have just seen.

But if you had to pinpoint what the US’s biggest advantage is, what would you have said?

According to a Bernstein Research report sent to Wall Street analysts, the US and allies have deployed 25 zettaFLOPs of compute in 2025, while China has deployed only <1 of Chinese chip ZettaFLOPs.

How “a lot” is that? Well, a lot.

I’m usually wary of such claims, but at least on the US side, the math more or less checks out. If we take Jensen Huang’s claim that they sold “4.5 million chips in 2025”, if we assume 80% of those were B200 equivalents and 20% H200 equivalents, that is:

So, just NVIDIA alone, which primarily sells in the US due to export restrictions, we have around 20 ZettaFLOPs. Once we count AMD, Google, and Amazon ASICs, the 25 number feels very likely.

Alternatively, we can view this comparison using the US Government’s TPP metric, Total Processing Performance, which it uses to define which chips can be shipped to China.

It’s a precision-normalized way of comparing different chips based on peak compute capacity, and it shows how the United States is currently much more capable of deploying compute, and will be so for the next several years (the difference is actually increasing):

But even then, our Western biases fool us once again while trying to understand China, as, according to Reuters, despite the obvious compute deployment issues, China will still “recommend” that local purchasers make a proportional purchase of domestic chips to their NVIDIA purchases.

Having compute is not only necessary to train increasingly more powerful models (the first scaling law), but it’s also instrumental for inference-time compute (the second scaling law) or for deploying more compute per task.

Bigger models trained for longer are a strong predictor of better performance, but so is the capacity to deploy them for longer, which might be a stronger predictor of performance today.

As you can see below, you can make a smaller model’s performance become “as good” as a much larger model simply by allocating more compute:

But as we said earlier, inference is now also critical to training, thanks to Reinforcement Learning. In such training, to update a model, to make it better, you take your current model version, generate, say, 100 inference rollouts (tries at solving the problem), see which ones worked, and learn from those (updating the model to a new state), and discard the rest.

But inference, no matter where you look at it, is a real problem to serve. Real demand is extremely latency-sensitive, which forces you, as an AI cloud provider, to preallocate compute resources to models that may be demanded in the future… or not.

So, in a scenario of already-tight compute, you’re also purposely risking having idle clusters waiting for sub-par demand simply because you need to meet SLA (Service Level Agreements) for users requesting access to those models.

As Alibaba acknowledged, at one point, they were using almost 20% of their compute capacity to serve only 1.35% of the total request volume. Inference is a nightmare that only gets darker when you’re compute-constrained like China. Hold this thought because this will become key later.

Therefore, you have three axes of pressure to have more compute:

And knowing all this, what to expect in 2026?

The moment you start to pull the strings to see where the different components of a Huawei CloudMatrix come from, you begin to realize where China’s real problems are.

To this day, China still relies heavily on the US and its allies for access to hardware and for the deployment of compute.

This server is a 599kW (more than half a MegaWatt) beast that takes an entire corridor of an AI data center, encompassing 16 racks, of which 12 are filled with NPUs (Neural Processing Units, a lower-power accelerator), with 32 per rack, and four racks for the networking gear required to make the accelerators communicate with each other.

As we saw earlier, this server is mighty. However, the issue for China is that most parts are foreign.

The chips, the Ascend 910C, China’s most powerful chip, were designed in China but, to this day, are still primarily based on an illegal purchase of manufactured and packaged chips from TSMC, not produced locally (though this is changing, as we’ll see in a second).

The memory chips are also foreign, coming from a huge purchase made by Samsung last year, before the HBM sanctions kicked in (memory chip companies are also forbidden to manufacture for Chinese companies).

And perhaps even more concerning for China, the advanced packaging was also performed by TSMC, the process that packs the compute Ascend dies and the Samsung HBM chips into a single CoWoS (Chip-on-Wafer-on-Substrate) package, one of the industry's key bottlenecks.

But this could soon meaningfully change. As soon as next year, actually.

China’s current most significant manufacturing and advanced packaging champion, SMIC, has considerably ramped up manufacturing capacity for 2026, to the point that SemiAnalysis believes SMIC, once a bottleneck to Ascend chip production, will no longer be one, meaning 2026 could see a considerable increase in locally-produced Ascend chip dies to more than 3.5 million dies in 2026 with SMIC alone.

On the other hand, Huawei, once just a chip designer, seems very committed to becoming a fully verticalized company, from wafer fab equipment to chip design to advanced packaging (including proprietary HBM). In other words, Huawei is primed to become ASML, NVIDIA, and TSMC all in one.

But how?